FPGA Based Powertrain Control for Electric Vehicles

Current legislation in European countries, as well as in other parts of the world, is putting stricter limits on pollutant emissions from road vehicles. This issue, in conjunction with the increase awareness of consumer for the environmental problems, will require the development of new clean propulsion systems in disruption with the current mobility solutions based on internal combustion engine. Electric, hybrid and fuel-cells vehicles (Chan, 2007) are now recognized as an indispensable mean to meet the challenges associated with sustainable mobility of people and goods. In this paradigm shift, the electric motor (EM) will assume a key role in the propulsion of future vehicles and, unlike vehicles based on internal combustion engines, the high energy and power densities will facilitate the development of new powertrains configurations. In particular, multi-motor configurations, where several EMs are allocated to each driven wheel of the vehicle, represent an attractive configuration for electric vehicles (EVs), due to the independent wheel torque control and the elimination of somemechanical systems, like the differential. These features, allied with the fast dynamics of EMs, are being explored to increase the vehicle maneuverability and safety (Geng et al., 2009) and improve the performance of the EV traction system (Hori, 2004). To cope with this rise in functional and computational complexity that current (and future) EVs require, in this work we explore the new Field-programmable Gate Array (FPGA) platform to address the powertrain control, i.e. involving the electric motor and the power converters control, of multi-motor EVs. In the past two decades, motor control applications have been dominated by software based solutions implemented in DSPs (Digital Signal Processors), due to the low cost and ease of programming (Cecati, 1999). However, these DSP solutions are facing increasing difficulties to respond to the ever-increasing computational, functional and timing specifications that modern industrial and vehicular applications require (Monmasson & Cirstea, 2007). For instance, when single-coreDSP based solutions needs to incorporate complex and time-critical functions, e.g. multi-motor control, the sequential processing of this approach decrease the controller bandwidth (see Fig. 1), which may compromise the application timing specification. Multi-core DSPs are a possible alternative to address this concern, but they also add costs and interconnection complexity. Consequently, in the last years, FPGAs received an increased interest by the academy and industry as an option to offload time-critical tasks from the DSPs (Lopez et al., 2008; Rahul et al., 2007; Ying-Yu & Hau-Jean, 1997), or even replace the DSPs control platform by a System on Chip (SOC) based on FPGAs (Idkhajine et al., 2009). 7